The above findings clearly demonstrate that the MoS2 nanodiscs fabricated via CVD have uniform morphologies, structures, and electrical properties. The electrical properties of the

MoS2 nanodisc-based back-gated FETs, with Ni as the source, drain, and back gate contacts were next investigated at room temperature. Figure 4a shows the relationship between the gate current (I GS) and the gate voltage (V GS) of the transistor at a drain voltage (V DS) of 5 V. The current through the device increases exponentially with the applied positive voltage, and tends to be almost zero under the revised voltage, showing that the MoS2 transistor is a good rectifier. Figure 4 The current–voltage behavior of back-gated MoS 2 transistor. (a) Gate current I GS versus gate voltage V GS behavior of back-gated MoS2 transistor at room temperature for the drain voltage V DS value of 5 V. (b) Output characteristics of back-gated MoS2 transistors see more at room temperature Mocetinostat for V GS values of 0, 5, 10, 15, and 20 V. Figure 4b displays the output characteristics (drain current I DS versus drain voltage V DS) of back-gated MoS2 transistors at room temperature for V

GS = 0, 5, 10, 15, and 20 V. For small V GS, the current I DS shows an exponential dependence on V DS at low V DS values, which results from the presence of a sizable Schottky barrier at the Ni-MoS2 interface [12]. Then, for larger values of V GS, the relation between I DS and V DS becomes linear as V DS increases, which is consistent with the previously reported findings [12].

The barrier height at larger V GS is lower that has been previously demonstrated in greater detail [12, 30, 31]. Thus, the channel can give rise to thermally assisted tunneling, which is responsible for the linear relationship between I DS and V DS. Finally, when V DS increases above a certain value, the current I DS becomes saturated, achieving the output properties of a traditional FET. Figure 5a shows the transfer characteristics (I DS/V GS) of the back-gated MoS2 transistor at room temperature for V DS = 1 V. It is clear that the gate leakage of the FET is negligible and the on/off current ratio can be up to 1.9 × 105, larger than that in the WSe2-based FETs at low temperature [32], which demonstrates that the MoS2 transistor can be easily modulated by the back gate. Farnesyltransferase Moreover, the Fermi level of Ni is close to the conduction band edge of MoS2, consistent with earlier reports [7, 12], which makes MoS2 transistors exhibit mostly n-type behavior. Figure 5b shows the variation of the device transconductance g m (g m = dI DS/dV GS) with V GS at V DS = 1 V. The extracted maximum g m is about 27μS (5.4 μS/μm) within the entire range of V GS, better than previously reported values [7, 12]. The field effect mobility μ also can be obtained based on the conventional dependence of μ = g m [L/(W · C OX  · V DS)] at V DS = 1 V, where g m is the maximum value of g m, and L and W are the length and width of the channel, and C OX = 1.